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Altera_Forum
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10 years ago

How to connect qsys clock output pin from PLL (C0 and C1) to two physical pin in MAX1

Hi all, I'm new to fpga. I got a BeMicro MAX10 and I'm using qsys and the eclipse tool to make a nios2 system. I'm using quartus ii web v15.02. I got a system that works: nios2, ocram, leds,...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

If the Nios full demo for your exact board is all you have that uses SDRAM, start with that. Get it going as I outlined above and then make mods. For now, always start with something that is known good even if it doesn't resemble what you want to end up with. By making small changes and verifying them, you slowly advance to where you want to be.