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Altera_Forum's avatar
Altera_Forum
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21 years ago

How to add an userlogic to the tri-state bridge?

I want add an user logic in CPLD to NiosII which resides in FPGA, the logic is some registers and I want to add it to the tri-state bridge, thus Nios can write or read these registers through the tri...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
21 years ago

For example your device in CPLD

module yourdevice (reset, address, write, read, data);

input reset;

input write, read;

inout [7:0] data;

input [3:0] address;

reg [7:0] REG1;

....

assign data = (!address && read)? REG1:8'bzzzzzzzz;

//some code

always @ (address or reset or or write) begin

if (reset) REG1 <= 0;

else if (address==0) REG1 <= data;

end

endmodule

Your hdl file for Interface to user logic:

module yourdevice ( reset, address, write, read, data);

input reset;

input write, read;

inout [7:0] data;

input [3:0] address;

endmodule