How to add an userlogic to the tri-state bridge?

You can add using Interface to user logic.

Write some hdl file and describe only ports.

Data bus must be inout.

Open SOPC and run Interface to User logic, add file,

describe ports. In Instantiation tab choose Export Bus Ports.

In timing tab set time.

After that correct your ptf file if it need.

For example:

SYSTEM_BUILDER_INFO

{

Bus_Type = "avalon_tristate";

Address_Alignment = "dynamic";

Address_Width = "4";

Data_Width = "8";

Has_IRQ = "0";

Has_Base_Address = "1";

Read_Wait_States = "160.0ns";

Write_Wait_States = "160.0ns";

Setup_Time = "40.0ns";

Hold_Time = "40.0ns";

Is_Memory_Device = "1";

Uses_Tri_State_Data_Bus = "1";

Is_Enabled = "1";

}

PORT_WIRING

{

PORT addr

{

width = "4";

direction = "input";

type = "address";

is_shared = "1";

}

PORT data

{

width = "8";

direction = "inout";

type = "data";

is_shared = "1";

}

PORT read_n

{

width = "1";

direction = "input";

type = "read_n";

}

PORT write_n

{

width = "1";

direction = "input";

type = "write_n";

}

}

You can use dynamic alignment (device_address[0] == avalon_address[0], data bus 8 bits) , and in program you could access to you port using structure

# pragma pack(1)

typedef struct _device

{

unsigned short REG0; //All registers are 16 bits in this case

unsigned short REG1;

unsigned short REG2;

unsigned short REG3;

unsigned short REG4;

unsigned short REG5;

unsigned short REG6;

unsigned short REG7;

} device;# pragma pack()

device *p =(device*) DEVICE_BASE;

....

p->REG0 = 0x00FF;

....