How much ram to allocate for Exception memory?

I was actually wondering the same thing today. I am working on a design am worrying about truncating the available address space. It appears that the Nios defaults to the following address locations:

Reset: 0x00000000

Exceptions: 0x00000020

Text: 0x00000400

I understand the top 2 are configurable in Qsys, but I have not seen a way to set the main program memory (I.E. txt) to anything other than its default size.

Source: http://courses.ece.ubc.ca/259/2011jan/lectures/l36%20nios%20ii%20interrupts%20advanced%20-%20shorthand%20notes.pdf

Unless you are very tight on memory, it's best not to mess with that. Even then don't try to change things down there unless you really understand what is going on. At best you are spending time for a very small return in memory. At worst you are introducing bugs that are very hard to find.

There is no reason to set the size of the text section. Its size is set automatically by the linker based on the size of your code. Note that QSYS has nothing to do with the text section. That is purely a software concept created by the linker. All QSYS needs to know is where the reset and exception addresses are.

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Unless you are very tight on memory, it's best not to mess with that. Even then don't try to change things down there unless you really understand what is going on. At best you are spending time for a very small return in memory. At worst you are introducing bugs that are very hard to find.

There is no reason to set the size of the text section. Its size is set automatically by the linker based on the size of your code. Note that QSYS has nothing to do with the text section. That is purely a software concept created by the linker. All QSYS needs to know is where the reset and exception addresses are.

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Well, in the case when using on-chip memory, you have to instantiate and therefore specify a size, so what should that size be.. as big as will fit, or is there a minimum size that will be plenty?

As with many things, there is no one answer here. It depends on number of factors and design decisions. Vectored interrupts or standard exception funnel? All ISRs in exception memory? etc, etc.

Initially, I would start with one of the design examples and see how it works for you. Since this is an FPGA, nothing is set in stone and you can adjust it as you learn how which options you choose affect the .exception size.

Good luck!

slacker

When building your code, the nios tools print the size of your code as well as how much memory is available for your stack and heap. It's up to you to figure out how much non code memory your application will need. IIRC the NIOS tools come with some memory use measuring tools. You might check the documentation.

A good starting point would be to use a small portion (20-30%) of the on chip memory so that FPGA routing resources aren't used up. Enlarge/shrink to fit your application.

This is easily calculable.

0x400 (Text Section) - 0x20 (Exception section) = 0d992

Divide this number by 4, and you get 248.

This means you can have 248 instructions (or labels) in your exception handler.