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Altera_Forum
Honored Contributor
21 years agohelp:sdram
when i start fitter my project ,there are some warnings like that: Warning: Can't pack node nios32:inst|sdram:the_sdram|m_addr[7] to I/O pin Warning: Can't pack logic cell nios32:in...
Altera_Forum
Honored Contributor
21 years agohow can i add a "I/o" port at the actural pins of FPGA?when a nios system generated, the address pin of sdram generated automaticly,and i put the type of out pin to connect to the address,and assign the fpga's pin .what's your mean?thanks!