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Altera_Forum's avatar
Altera_Forum
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15 years ago

Help neded debugging hardware cycloneII

The guy who designed this has long gone...

The board has an EP2C35, along with 64K serial flash, 256K x 36 SRAM and a small EEPROM. The board is programmed using USB Blaster via JTAG running under SOPC Builder 7.2 . That all works ok. I then reset the board and the NIOS checks to see if there's serial flash, and loads its config from there.Then the serial flash is transferred to SRAM ( operational software) and the CPU starts to run from there. The first thing it does is sets up some data in the EEPROM...... so far so good.

On the faulty boards, the FLASH to SRAM transfer is taking twice as long as it should and then the processor hangs somewhere as it doesn't write to EEPROM. ConfigDone and PldStatus are both correct...

I wish I could afford a Lauterbach ICE...Short of swapping chips one by one,has anyone comeacross something like this ? Bit of a long shot I guess...Suggesting software solutions is not an option as I'm clueless in that area :(

Chip swapping is no easy thing either- BGA and 100 pin TQFP...

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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Plenty of views but no help.... Is there anyone out there that could supply files to load via USB Blaster that runs the memory test mentioned in the NIOS2EDS software examples. ? I don't have a clue how to do it :(