Having problem with DMA and PIO...help..urgent

Dear all,

I'm having problems with DMA and PIO.

Currently I'm trying to implement DMA in my Nios-II system to perform data transfer from peripheral (from a PIO) to memory. There are several questions that I want to ask :

1. about sopc connection

In my current Nios system, I have implemented two SG-DMAs, a TSE-MAC IP, a DMA, and a PIO. You can check the SOPC connection in the attachment. There is no problem with SG-DMAs and TSE-MAC connection.

My first question is if I want the DMA to transfer data from the PIO (pio_data_8bit) to SDRAM, can I connect the DMA write_master_port to the same Avalon-MM pipeline bridge which used by the two SG-DMAs? or do I have to put another pipeline bridge? or do I have to connect the DMA's write_master port to the SDRAM directly?

2. about programming dma using hal

Using the SOPC connection in the attachment, I wrote program using HAL to program the DMA as follow :

void do_dma()
{
	alt_u32 	data_mem_offset = 0x00000000;
	printf("-------------Configuring DMA-------------\n");
	//control reset
	IOWR_ALTERA_AVALON_DMA_CONTROL (DMA_DATA_8BIT_BASE, 0x0);
	//status bit must be reset
	IOWR_ALTERA_AVALON_DMA_STATUS(DMA_DATA_8BIT_BASE, 0);
	printf("DMA status  : %d\n",IORD_ALTERA_AVALON_DMA_STATUS (DMA_DATA_8BIT_BASE));
	//set read address (peripheral address)
	IOWR_ALTERA_AVALON_DMA_RADDRESS(DMA_DATA_8BIT_BASE, (alt_u32)PIO_DATA_8BIT_BASE);
	printf("DMA read address   : %x\n",IORD_ALTERA_AVALON_DMA_RADDRESS (DMA_DATA_8BIT_BASE));
	//set write address (SDRAM address)
	IOWR_ALTERA_AVALON_DMA_WADDRESS(DMA_DATA_8BIT_BASE, (alt_u32)DDR3_TOP_BASE);
	printf("DMA write address  : %x\n",IORD_ALTERA_AVALON_DMA_WADDRESS (DMA_DATA_8BIT_BASE));
	//set DMA length
	IOWR_ALTERA_AVALON_DMA_LENGTH(DMA_DATA_8BIT_BASE, sizeof(char)*32);
	//printf("DMA length         : %x\n", IORD_ALTERA_AVALON_DMA_LENGTH(DMA_DATA_8BIT_BASE));
	IOWR_ALTERA_AVALON_DMA_CONTROL (DMA_DATA_8BIT_BASE, ALTERA_AVALON_DMA_CONTROL_BYTE_MSK |
			         ALTERA_AVALON_DMA_CONTROL_GO_MSK |
			         ALTERA_AVALON_DMA_CONTROL_LEEN_MSK |
			         ALTERA_AVALON_DMA_CONTROL_RCON_MSK);
	printf("DMA control : %d\n",IORD_ALTERA_AVALON_DMA_CONTROL (DMA_DATA_8BIT_BASE));
	printf("DMA status  : %d\n",IORD_ALTERA_AVALON_DMA_STATUS (DMA_DATA_8BIT_BASE));
	return 0;
}

I got a weird result. Even though I've set the transaction length in the DMA controller register, the DMA status register showed that the LEN bit was in active condition (LEN = 1) meant the length register was zero. So the DMA assumed the transaction was finished even though there was no data came from the PIO yet. I thought this problem was caused by the wrong connection in the SOPC system.

Another thing is when I tried to debug my program as hardware in Nios-II EDS, my program always stopped in this line :

printf("DMA length         : %x\n", IORD_ALTERA_AVALON_DMA_LENGTH(DMA_DATA_8BIT_BASE));

That's why in the code above I just commented that line.

What do you think about this problem?

Please help me to solve this problem... I've been stuck to solve this problem for two weeks until now..T__T Just tell me if you find any mistakes in my code or in my SOPC system design or if you have another suggestion about how to implement peripheral-->memory data transfer using DMA.

I really appreciate any comments and helps. Thanks all.