Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
21 years ago

Hard lock with Nios 2 cyclone dev board

Hey guys, I'm trying to get to work developing on the nios development kit cyclone edition. The board has a Nios II chip version 1.1 and a Cyclone EP1C20F400C7 FPGA. I am running Quartus II 4.2...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
21 years ago

Soin- I went back and checked and I am using the .ptf that matches my core in the "SOPC Builder System". When the Quartus programmer comes up I specifying the matching .sof file and I am still experiencing the hard lock after Quartus II tells me I have a successful flash.

Fischer - I did do the power on reset and the LED indicates that it is attempting to load the user core, but then it fails and reverts back to the fail-safe core again. It should successfully load the user data after step 4, right?

Any other ideas? Thanks again for all the help guys!

-Jon