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Altera_Forum
Honored Contributor
13 years agoGigabit Ethernet Interface (via Marvell 88E1111) with Cyclone IVE FPGA
Hello Everybody, I am using Altera DE2-115 Board (CyloneIVE device) and want to connect some other device running in Gbps via its Gigabit Ethernet Transceiver (Marvell 88E1111) interface. ...
Altera_Forum
Honored Contributor
12 years agoBefore filling up your IP and UDP header structures, you need to be sure that they point to the correct part of your buffer in tx_frame. ip should point to the area just after the Ethernet header that you already filled, and udp should point just after ip. Then your packet data should follow. Something like this:
( top level)
# define ETH_HEADER_SIZE 16 // 14 for the Ethernet header, + 2 for the 32-bit alignment packing bytes
( in your function, just after the struct ipheader *ip; and struct udpheader *udp; lines)
ip = (struct ipheader*)(tx_frame + ETH_HEADER_SIZE);
udp = (struct udpheader*)(tx_frame + ETH_HEADER_SIZE + sizeof(struct ipheader));
and write your data starting at tx_frame + ETH_HEADER_SIZE + sizeof(struct ipheader) + sizeof(struct udpheader) You can set the destination port number in the udpheader structure (udph_destport)