Getting Nios to talk to on chip logic

Cobra,

I struggled with the nomenclature ... Megafunctions vs Components. I am in the same situation as you and need to create a Avalon new Avalon component.

In the QSYS , you can click on new under the library of components and that will allow you to generate a new component. There are some pre-defined interfaces.

Also check out this http://www.altera.com/literature/hb/qts/qsys_components.pdf

In I am still not sure how to add actual RTL to the component but believe in the case of an Avalon MM slave, possibly the same signals are used as the interface signals.

Once you have created a new component ... it will show up as a component in your library section.

Add the component to your desigh in QSYS and connect up all the signals ... it checks for this then

Run generate in QSYS and the new RTL design will be in the Quartus system where you can synthesize it.

I need to add a monitor to perform some monitoring of data coming out of an Avalon MM slave to perform ordering rules checks at speed.

Does anyone know if there is an Avalon MM monitor template since when I try to connect a slave to a slave it doesn't compute .

Thanks , Bob.