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Altera_Forum
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16 years ago

gcc optimisation for movsi_internal

The gcc sources (9.0 b141) seem to be missing the pattern that would load a 32bit values whose low bits are all zero into a register (ie a single movhi instruction), the patterns for orhi and andhi a...
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Altera_Forum
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16 years ago

Hmmm....

You might manage to add sections to the list of 'small' sections in nios2.c for %r0 relative addressing. And then output nnn(r0) instead of the %gprel(nnn)(gp) for such symbols.

Might be possible to use one of the MACH_DEP symbol flags to qualify SMALL_DATA.