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Altera_Forum
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16 years ago

gcc optimisation for movsi_internal

The gcc sources (9.0 b141) seem to be missing the pattern that would load a 32bit values whose low bits are all zero into a register (ie a single movhi instruction), the patterns for orhi and andhi a...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

So there's no way to optimize out the unnecessary movhi after relocation?

I don't know enough about the compile/link/etc chain yet to know why this would not be possible.