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Altera_Forum
Honored Contributor
16 years agogcc optimisation for movsi_internal
The gcc sources (9.0 b141) seem to be missing the pattern that would load a 32bit values whose low bits are all zero into a register (ie a single movhi instruction), the patterns for orhi and andhi a...
Altera_Forum
Honored Contributor
16 years agoThat should happen provided the address is a compile-time constant (ie not the address of a relocatable).
Check what gets generated for *((unsigned char *)0x1000).