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Altera_Forum
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16 years ago

gcc optimisation for movsi_internal

The gcc sources (9.0 b141) seem to be missing the pattern that would load a 32bit values whose low bits are all zero into a register (ie a single movhi instruction), the patterns for orhi and andhi a...
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Altera_Forum
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16 years ago

Hi dsl,

I like the fact that you are doing something about the compiler. It's lack of optimization astounds me.

Have you done anything for load/stores for address whose top 16-bits are zero? I want to avoid the unnecessary movhi instn in this case and only use just a movi. Do you see a problem with this?

I've never had to look inside gcc and the .md files, etc, but I think I can manage this change and I would like to consider a few others.

Thanks, Peter