Forum Discussion
Full On-Chip Memory
Hi,
I'd like to know how to determine if the memory space of an on-chip memory is full. In my nios II system, I generated an on-chip M4K memory. It's size is 4096 bytes with a 32 bits data width. So I've done some trial and error and some calculation about the specifications and have concluded that I have 1023 addressable spaces from 0x000 - 0x3ff. I have calculated that each addressable space can contain 32 bits of data. I tested this with the following code:IOWR(ONCHIP_MEMORY2_1_BASE, 0x3fe, "THIS IS TO TEST HOW MUCH DATA CAN A MEMORY SPACE CONTAIN");
alt_printf("%s\n", IORD(ONCHIP_MEMORY2_1_BASE, 0x3fe));
alt_printf("%s\n", IORD(ONCHIP_MEMORY2_1_BASE, 0x3ff)); The problem I face now is I don't know how big 32 bits of data is because I know that a character is 1 byte and so I hypothesized that a memory space addressed by 0x3fe for example would contain just 4 characters. However it held more than that (the string "this is to test how much data can a memory space contain"). How big is a string anyway? and when I try to read out on a memory space that I didn't write to I get the garbage values below. nios2-terminal: connected to hardware target using JTAG UART on cable
nios2-terminal: "USB-Blaster ", device 1, instance 0
nios2-terminal: (Use the IDE stop button or Ctrl-C to terminate)
Hello onchip mem!
THIS IS TO TEST HOW MUCH DATA CAN A MEMORY SPACE CONTAIN
ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ
... (goes on for around 400+ lines)
What happened here? Thanks in advanced! Regards,27 Replies
- Altera_Forum
Honored Contributor
First DIRECT has nothing to do with cache. IOWR and IOWR_*DIRECT both bypass the cache. The main difference between IOWR and IOWR_32DIRECT is that IOWR_32DIRECT uses an offset as parameter that is directly added to the base value to calculate the address, whereas IOWR uses a register number that is multiplied by 4 before being added to the base value to calculate the address. The macros are described in this document (http://www.altera.com/literature/hb/nios2/n2sw_nii52007.pdf).
Second, strings in C don't work the way that you expect in those examples. It isn't specific to the Nios platform, it is just how strings work in C. When you have this line:
The C compiler will reserve 57 bytes in the .data section and put the string in there. If you use the default settings for the linker script, the .data section will end up in main RAM with your software code. Then the IOWR macro will be called with the *address* of the string. Not the string itself. It is the address that is copied in the onchip memory, not the string. When you doIOWR(ONCHIP_MEMORY2_1_BASE, 0x3fe, "THIS IS TO TEST HOW MUCH DATA CAN A MEMORY SPACE CONTAIN");
The *address* of the string is read back from the onchip memory and given to alt_printf(), that will read the string from the .data section and print it. The string itself is never copied to the on_chip ram, and the address will always take 4 bytes on the Nios 2 platform, whatever the size of the string is.alt_printf("%s\n", IORD(ONCHIP_MEMORY2_1_BASE, 0x3fe)); - Altera_Forum
Honored Contributor
--- Quote Start --- When you have this line:
The C compiler will reserve 57 bytes in the .data section and put the string in there. If you use the default settings for the linker script, the .data section will end up in main RAM with your software code. --- Quote End --- Actually the 57 bytes will end up in the .rodata.str1.4 section and the default linker script will merge this with all the readonly code sections (rather than the read-write data sections).IOWR(ONCHIP_MEMORY2_1_BASE, 0x3fe, "THIS IS TO TEST HOW MUCH DATA CAN A MEMORY SPACE CONTAIN"); - Altera_Forum
Honored Contributor
Hi Daixiwen and dsl,
Now I understand what happens when I write a string. Thank you. By the way, if will write a continuous bit stream into the memory, if the 4byte space is full will the data automatically be stored in the next 4bytes? Also when I do this: IOWR_32DIRECT(mem1, 0x00, 0x54); and try to read 0x00 until 0x03 i get: 0x00: 54 0x01: 54 0x02: 54 0x03: 54 Why is this so? Thank you. - Altera_Forum
Honored Contributor
The IOWR_*DIRECT macros always do read/write access aligned with their word length. IORD_32_DIRECT will therefore ignore the low 2 bits of the offset to align it to 32-bit words. IORD_32DIRECT(mem1,0x00) through IORD_32DIRECT(mem1,0x03) will all read the same address, the first one in mem1.
- Altera_Forum
Honored Contributor
Is there a way to data in the memory space in the middle of the byte addresses? say 0x02 or 0x03 and not read from 0x00. For example I write 0xABCDEFGH in the 32bit memory space 0x00 to 0x03, so each byte address would hold 2 hex characters. What if I want to access the Hex CD only? :)
- Altera_Forum
Honored Contributor
You need to do a byte read ...
The IOWR (etc) are designed for device register access - which are usually 32bit. You shouldn't do 32bit accesses from misaligned addresses, they are undefined on the niosII and could cause an interrupt. - Altera_Forum
Honored Contributor
What does misaligned addresses mean?
- Altera_Forum
Honored Contributor
Do you know a function that can do a device register read?
- Altera_Forum
Honored Contributor
Hi,
you can use IORD_8DIRECT or IORD_16DIRECT, too. I think you have to include "io.h". - Altera_Forum
Honored Contributor
markjco - yoiu need to ask whoever is teaching you about memory busses and word 'endianness' ...