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Altera_Forum
Honored Contributor
15 years agoBe very careful how you implement the clock switching. If you are dynamically switching the clock speed without putting the processor into a reset state then the pipeline and other surrounding logic may become unstable causing the processor to go into the weeds. Normally what I see others do is store off the processor state into a memory that will stay live, force the processor into reset, switch the clocks, bring the processor out of reset, the processor executes code that restores the state.