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Altera_Forum's avatar
Altera_Forum
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14 years ago

Frequency Maximum for Fast Model Cyclone IV GX

I implement a design using Quartus II. The device that I choose is Cyclone IV GX (mode: auto). After compilation, there are 3 timing models: slow 1200mV 85C, slow 1200mV 0C and fast 1200mV 0C. For slow 1200mV 85C, Fmax 332.89 MHz, for 1200mV 0C, Fmax 369.69 MHz, but I did not find any Fmax information for fast 1200mV 0C model. Can anyone tell me where it is? or how to calculate it?

I converted Fmax 332.89 MHz and 369.69 MHz to delay, they are about 3 ns and 2.705 ns respectively. Unfortunately, I did not find any value equal to these delays (3 ns and 2.705) in the TimeQuest Timing Analyzer Report. How the Quartus calculate/ estimate those Fmax?

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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    First, the slow model at a given temperature is the worst case. The fast model should be better.

    Regarding delay... what delay ?

    fmax has two components. classical fmax and restricted.

    classic fmax = 1/(launch reg tco + latch reg tSU).

    i.e. you can go as fast as almost hitting the tSU window.

    restricted fmax is a new concept that appeared with super fast fpga.

    You may not go as fast as classic because of other restrictions e.g.

    -minimum pulse width

    -minimum period (max allowed toggle rate)

    -hold time violation (normally tH is protected by inbuilt silicon delays that make sure clk is always faster than data but with very fast clk you may hit back at previous edge hold time of latching reg)