Frequency Maximum for Fast Model Cyclone IV GX

First, the slow model at a given temperature is the worst case. The fast model should be better.

Regarding delay... what delay ?

fmax has two components. classical fmax and restricted.

classic fmax = 1/(launch reg tco + latch reg tSU).

i.e. you can go as fast as almost hitting the tSU window.

restricted fmax is a new concept that appeared with super fast fpga.

You may not go as fast as classic because of other restrictions e.g.

-minimum pulse width

-minimum period (max allowed toggle rate)

-hold time violation (normally tH is protected by inbuilt silicon delays that make sure clk is always faster than data but with very fast clk you may hit back at previous edge hold time of latching reg)