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Altera_Forum's avatar
Altera_Forum
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19 years ago

FPGA programming Problem

Hello This is not a really Nios problem but an FPGA problem. I have the Nios II development Kit with the cyclone II. I want to write a very small and easy VHDL code example to test the Development...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
19 years ago

I don't know cyclone II kit, but altera dev kits have a configuration epld

which is triggered by a special pin (pld_RECONFIGREQ_n) to reload

the fpga. set this pin inactive in your design.

also set unused pins = as inputs tristated in your design.