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Altera_Forum
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11 years ago

FPGA memory initialization and management

Hi, my design is using a cyclone IV on-chip memory. I have two questions (for the moment): - when configuring the memory with qsys, I don't really understand the data-width choice. If it's 32-bi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

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I don't use an Avalon-MM but a dual-port RAM in Qsys. One is connected to the cpu, the other is exported so the FPGA design can write on it. I don't know why, but the results don't seem good.

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Read the code and see what it does with the altsyncram address port.

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For the editor, I don't find it in any Quartus II menu. Where is it?

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File->New, Memory Files, Hexadecimal (Intel-Format) File.

Cheers,

Dave