FPGA design & user program in EPCS?

Hi queisser,

> Will that cause the flash programmer to put my program into the EPCS?

I always use the command line for this ... since I can roll it into a make

target. Here's what I do:

1. create the application flash:

$ elf2flash --epcs --base=0x0 --end = 0x7fffffff --flash=<whatever>

--input=<your app elf> --outfile=<your app flash>

2. program the app to the epcs:

$ nios2-flash-programer --epcs --input=<your app flash> --sof=<your pgmr sof>

3. create the flash file for your fpga sof:

$ sof2flash --epcs --input=<fpga sof> --offset=0x0 --output=<fpga flash>

4. program ther fpga image:

$ nios2-flash-programmer --epcs --input=<fpga flash> --sof=<your pgmr sof> --relocate

> Can I create a JIC file that combines the FPGA and user code?

Sorry ... never used JIC.

> Will I still have to set the reset address to the EPCS?

No. The epcs bootloader code just won&#39;t run. So you&#39;ll have to do

the bootstrap in your own app.

> Is it still possible to debug the program by loading the SOF file into RAM

Yes. After loading the fpga configuration via jtag, everything will work

as normal. If you happen to set your reset address to the epcs bootloader

code, it will still grab the application from the epcs.

Regards,

--Scott