One solution to your problem is to use a lookup table, just as you have done in your C code.
In your C code, your arrays "cos_fast" and "sin_fast" could be realized with FPGA on-chip memory (ALTSYNCRAM as a ROM).
The contents of that memory would be initialized with the contents of a data file which you would populate prior to compiling your FPGA.
At run-time, your loop iterator "k" would be tied to the address input port of the given on-chip memory, while the data output ports of that memory would be tied to the input of your ALTFP_MULT multiplier.