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Honored Contributor
Honored ContributorFloating point math
Hello,this would be my first real job with fpga, and because of that, i need some help. Originally i was using STM32F4 to make single point DFT from 128 point array, but even at 250MHz it is too s...
Altera_ForumHonored Contributor
Honored ContributorThe processor manual for that chip advertises 3 cycles for floating point multiply-accumulate, which it looks like your inner kernel requires two of them and at 250MHz is considerable power.
If you are actually realizing performance significantly worse than that, then your question becomes an STM32 tools / optimization discussion not appropriate for this forum although many people here may be knowledgeable about it. If you are certain you have already maxed out the chip and definitely require a co-processor in an FPGA, then you will need to say some more about your proposed system architecture and requirements.
