Honored Contributor
Honored ContributorI believe (I've not used them!) that IOWR_DIRRECT() generates an 'stwio' instruction and IOWR_16DIRECT() an 'sthio' instruction. Both these instructions will generate a 32bit Avalon master cycle, the first will have all 4 byte enables asserted, for the second only 2 byte enables are asserted.
The 'bus width adapter' generates two cycles into the 16bit slave, for 'stwio' both will have the 2 bytes enables asserted, for the 'sthio' one of these cycles won't have any byte enables asserted. The Avalon slave cycle without any byte enables is probably invisible on the flash device itself.
