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Altera_Forum
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20 years ago

FIFOed Avalon Uart

I have posted the FIFOed avalon UART in the Hardware Projects area. It is the standard UART that comes with Nios but it has additional features such as FIFOs and hardware CTS fifoed avalon uar...
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Altera_Forum
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16 years ago

Ok, I've just set TX and RX depths to be the same, and that seems happy. Now the BSP isn't compiling properly because in the IOCTL routines it uses dev which is undefined (lines 701 and 740). I've just looked at the altera driver and that uses sp in those places, so have changed to that....

It would also appear that various# define's didn't make it into system.h, namely

RS422_UART_PARITY, RS422_UART_STOP_BITS, RS422_UART_BAUD, RS422_UART_DATA_BITS, RS422_UART_FREQ

Not at all sure why.

And a minor thing, in SOPC Builder when I click Generate it asks me if I want to save, so I say Yes, but when it has finished generating and I exit SOPC builder it asks me again if I want to save even though I've not changed anything.

Again, is this all because I'm using 8.1, not 9.0?

Cheers,

Simon