Fft In Sopc

you can use this one:

--- Quote Start ---

module fft_avalon_wraper

(

input clk,

input reset_n,

input mm_writedate,

input mm_write,

input sink_valid,

input sink_sop,

input sink_eop,

input [31 : 0] sink_data,

input sink_error,

input source_ready,

output sink_ready,

output source_error,

output source_sop,

output source_eop,

output source_valid,

output [39 : 0] source_data

);

reg inverse;

always@(posedge clk)

begin

if(mm_write)

inverse = mm_writedate;

end

assign source_data[39 : 38] = 2'b0;

your_fft_from_megawizard fft_inst

(

clk,

reset_n,

inverse,

sink_valid,

sink_sop,

sink_eop,

sink_data[31 : 16],

sink_data[15 : 0],

sink_error,

source_ready,

sink_ready,

source_error,

source_sop,

source_eop,

source_valid,

source_data[37 : 32],

source_data[31 : 16],

source_data[15 : 0]

);

endmodule

--- Quote End ---

your_fft_from_megawizard is your fft module, configure it's interface as streaming.

this wraper contains 3 avalon interface:

streaming sink and streaming source: data input and output, read latency = 0, 8 bits per symbol, use 2 sgdma-s for connecting them to you memory, data adapters may needed.

memory map: control the inverse signal of you fft, set it's addressing as NATIVE.

take attention to the width of sink_data and source_data, you may modify them and their connection to sink_real, sink_imag, source_exp, source_real, source_imag due to your own fft module.

you can refer to fft megacore function user guide.pdf, which contains detailed information about the interface.

Thanks a lot for replying back to me. I realy appreciate it.

Progress :-

1) 2 modules>> FFT AND WRAPPER.

2) SOPC builder ( wrapper is top level module) 2 errors>>

avalon_slave</b>: Interface must have an associated clock.

3) In the SOPC builder i called >> CPU....On chip mem......2SGDMA's

I am using quartus for the first time, could you please tell me how to connect and what to connect using SGDMA's in DETAIL ...and the following steps...

Photos would be helpful.

Please help me out !!

Thanks a lot

Email address ..... webster_dev(at the rate )yahoo.com

Interface must have an associated clock:

http://www.alteraforum.com/forum/attachment.php?attachmentid=2487&stc=1&d=1273500288

Components connection:

http://www.alteraforum.com/forum/attachment.php?attachmentid=2488&stc=1&d=1273500313

sgdma_fft_mm_to_st: 32bit width

sgdma_fft_st_to_mm: 8bit width

all data adapters support package.

be careful of the data adapters' empty signal.

How to use SGDMA:

refer to http://www.altera.com/literature/hb/nios2/qts_qii55003.pdf

Thanks a lot....I really appreciate you taking out time an helpin me out

This is where ive reached but couldnt figure out the errors.

1 >>> The SYSTEM......Do you have any recommendations regarding it.... Do i need to add any other component.

2>>>> Errors that are needed to be resolved.

Do you know how to run this on Nios...i mean once FFT is built and loaded on fpga.....do you have a C code to run it...?

Thanks again...!!

Hi

I have a report due soon and am not able to get results. Please help me doin so as am stuck and am not able to proceed further.

Ill be more than thankful if you could help me out in this. Am using the systme for the first time and its really difficult without any guidance.

Thanks a lot for helpin me

Dev

If you have an fft implemented using quartus and NIOS, could you please forward it to me.

[email protected]

Please help me out...!!

Thanks

I have followed the same step by step process, but I get an error in sopc builder: "The source has a empty signal of 2 bits but the sink does not" - between sgdma_fft_mm_to_st and the FFT wrapper. When I attempt to add an adapter (automatically) between the two components, I get a warning: "cannot adapt sgdma_fft_mm_to_st and FFT wrapper.... because empty symbol information will be lost.

Any ideas?

Hi every body:

i thing there are good way to add FFT to sopc builder, that by using C2H tool,

i added a tutorial about how to add FFT to sopc builder.

read the PDF and try to follow the tutorial.