Altera_Forum
Honored Contributor
Honored ContributorExternal controller accesses
Is it possible for an external processor to read\write data to internal memory of the gate array that is implemented outside of the SOPC system
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Altera_ForumHonored Contributor
Honored ContributorSure it is possible!
(What would be the purpose of a sopc system without interface towards the world outside?) You can interface memory outside sopc system (either internal to FPGA or external) in several ways. You generally need to export Avalon MM bus signals and provide the necessary glue logic to your memory. Alternatively you can use a tristate bus component which can be directly connected to a typical async ram. You can even use a PIO, but not if you need performance (you must manually drive pio pins to emulate memory control signals: rd,wr,addr... )
