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Altera_Forum
Honored Contributor
Honored ContributorExternal bus interface
I'm trying to implement something similar to the MMC interface with the Nios II through DMA and/or Avalon bus. This interface consists of 1 clock and 5 bi-directional data signals. In the ...
Altera_ForumHonored Contributor
Honored Contributoralso had such a problem
try the following the interface will need at least write,read, chipselect and one address line, you can set write,read,address as shared, and you must not connect the chipselect signal. I think the avalon bridge needs the write,read and address signal.
