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Altera_Forum
Honored Contributor
21 years agoThanks very much for your reply,
I´m a little bit confused about the fact, that a get a signal e.g. read_n_to_the_sram_0, write_n_to_the_sram_0, even if these signals are marked as 'shared' in the ptf file. You wrote: - You need not hook up every signal that is shared (ext_ram_bus) to every pin on every chip is it also true, that I need not hook up every 'none shared' signal to the specific chip, if I can use a shared signal instead ? I changed the setup of my HFCE1 chip to be_n[3..0], however it only need's two signals be0_n and be1_n. I did this to get a shared bus "ext_ram_bus_byteenablen[3..0]. So I will connect: be_n_to_the sram_0[3..0] - ***not used*** chipselect_n_to_the_HFCE1_0 - HFCE1_CS_N ext_ram_bus_address[22..0] - A[22..0] to FLASH,SRAM and HFCE1 (A1 of bus to A0 of HFCE1, 16 Bit access) ext_ram_bus_byteenablen[3..0] - BE[3..0] to SRAM (uses BE[3..0]) and HFCE1 (uses only BE[1..0]) ext_ram_bus_data[31..0] - D[31..0] to FLASH,SRAM,HFCE1 ext_ram_bus_readn - FLASH_OE_N, SRAM_OE_N and HFCE1_RD_N ext_ram_bus_writen - SRAM_WE_N and HFCE1_WE_N read_n_to_the_sram_0 - ***not used*** reset_to_the_HFCE1_0 - HFCE1_RESET select_n_to_the_ext_flash - FLASH_CS_N select_n_to_the_sram_0 - SRAM_CS_N write_n_to_the_ext_flash - FLASH_WE_N write_n_to_the_sram_0 - ***not used*** I connected "write_n_to_the_ext_flash" to FLASH_WE_N, because this signal is marked as 'not shared' in the ptf file. Is this correct ?