Forum Discussion
Altera_Forum
Honored Contributor
15 years agoThanks for the response. Yeah, I agree it looks like I will have to ‘hand’ decode the instructions – the problem is assembler code is not my strength.
As for defining the structures as ‘packed’ – the fact is that the vast majority of the existing code originates from the days when 8-bit processors were the norm. The structures were not defined as packed.. all elements were 8-bit aligned by virtue of the underlying architecture. Moving to a 32-bit processor simply breaks the existing code. Not sure shooting the person who original wrote the code is an option! Maybe holding a large stick to whoever wrote the Nios II compiler whilst pointing out (no pun intended) that they should provide a way of dealing with this situation. As way of an example they should take a look at Altium’s Tasking compiler for the Nios II. This provides a way of declaring pointers as unaligned which then forces the linker to generate byte access code – simple. Unfortunately Altium has pulled support for the Tasking compiler so it can’t be used with the latest Cyclone FPGAs, Quartus etc. That said I’m confident that the misaligned memory access exception is Altera’s intended solution to this situation. Ideally, I was hoping that there was a fully worked example. Failing that it would be nice to get confirmation that the exception handler is a workable solution in which case I can start to get to grips with the necessary assembly code.