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Amirb8's avatar
Amirb8
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2 years ago

Ethernet Arch - Nios2, TSE and MSGDMA IP-Cores - REF Design

Hi, Is there a reference design that contains Nios2, TSE and MSGDMA (not SGDMA) IP cores? My goal is to verify if I successfully changed the old SGDMAs to the new MSGDMAs. In Eclipse I use the "S...
Nios Cpu
wwanalim_intel's avatar
wwanalim_intel
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2 years ago

Hi Amir,


Are you using this template?

https://www.intel.com/content/www/us/en/design-example/714912/intel-arria-10-fpga-nios-ii-processor-simple-socket-server-design-example.html


The closest reference design available I found for you based on your question above is this -

https://www.intel.com/content/www/us/en/design-example/714737/intel-cyclone-10-lp-fpga-hyperram-msgdma-reference-design.html

This reference design also come with tutorial.


Have a good day.

Regards,

Fathulnaim