Honored Contributor
Honored ContributorComparing Avalon to Xilinx's FSL is kind of incorrect.
Xilinx's FSL (fast simplex link) is Xilinx's best attempt at a high throughput path between the Microblaze or PowerPC and custom user logic. With Altera, you have two options: 1 - Create custom user logic. This would be a peripheral on the Avalon bus. The closest comparison would be a PLB or IPIF peripheral in Xilinx. Although Avalon is significantly faster. In this case the file "io.h" that Kevin pointed you to is the recommended way for accessing the component. If I remember correctly, Xilinx's SDK also gives you a "xio.h" file which basically just provides macros for accessing data. See the section beginning on page 9-4 of the following document: http://www.altera.com/literature/hb/nios2/n2sw_nii52007.pdf 2 - Create a custom instruction. Xilinx's FSL is most similar to this but custom instructions truly offer superior speed and flexibility. http://www.altera.com/literature/ug/ug_nios2_custom_instruction.pdf So, if you're just using an avalon component, use the IOWR and IORD macros or you can simply access the component as memory but you most bypass the cache. If it's a custom instruction you are creating, read the user guide I've given above. Jake
