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Altera_Forum
Honored Contributor
21 years agoEPCS Under Q4.2
Is the documentation correct for the EPCS device controller? Under Q4.1 the size of the boot loader rom was specified as 256 Words or 1Kbytes, The control registers are located immediately af...
Altera_Forum
Honored Contributor
21 years agoWith reference to my related thread, have there been any changes that could have affected the boot from epcs option?
I've got a system that worked under Q4.1 with flash at 0x0000_0000 EPCS at 0x0081_0800 and SDRAM at 0x0100_0000 My reset address is set to 0x0081_0800 and exception address is 0x0100_0020 and try as I might I can't get the thing to boot code from the EPCS. The sof appears to work correctly, the test application (the scrolling leds demo) works fine when directly downloaded but I can't program it into the epcs Even using the supplied NIOS flash programmer (with the system lib set to put all of the code elements into SDRAM) I specify the design sof, the executable and that it should also program the sof into the epcs but no joy.. One thing I note is that the ide build process is insisting on using the cfi.srec loader rather than the epcs one so how can I ensure it is using the correct one? Any suggestions...?