EPCS flash Programming error

Did you assign epcs controller outputs to device pins?

<div class='quotetop'>QUOTE </div>

--- Quote Start ---

In Cyclone® III devices, the EPCS controller does not automatically assign its output pins to the dedicated configuration pins on the FPGA. Instead, the output pins are exported to the top level design, giving users the flexibility to connect to any EPCS devices.

Therefore, in order to use the EPCS Configuration Controller the pins must be assigned manually, and the following settings must be made the Quartus® II software.

Please follow these steps:

Choose Settings from the Assignments menu

Click Device and Pin Options from the Device category

Click Dual-Purpose Pins and then make the following changes:

Data[0] -> Use as regular I/O

Data[1] -> Use as regularr I/O

DCLK -> Use as regular I/O

FLASH_nCE/nCS0 -> Use as regular I/O[/b]

--- Quote End ---

See Altera knowledge base (http://www.altera.com/support/kdb/solutions/rd11012007_792.html?gsa_pos=1&wt.oss_r=1&wt.oss=cyclone%20iii%20epcs)

Stewart Little, Thank you very much! We&#39;ve tried it and it works!

Dovish

<div class='quotetop'>QUOTE (Stewart Little @ Jul 6 2009, 04:40 PM) <{post_snapback}> (index.php?act=findpost&pid=23017)</div>

--- Quote Start ---

Did you assign epcs controller outputs to device pins?

<div class='quotetop'>QUOTE

--- Quote End ---

--- Quote Start ---

In Cyclone® III devices, the EPCS controller does not automatically assign its output pins to the dedicated configuration pins on the FPGA. Instead, the output pins are exported to the top level design, giving users the flexibility to connect to any EPCS devices.

Therefore, in order to use the EPCS Configuration Controller the pins must be assigned manually, and the following settings must be made the Quartus® II software.

Please follow these steps:

Choose Settings from the Assignments menu

Click Device and Pin Options from the Device category

Click Dual-Purpose Pins and then make the following changes:

Data[0] -> Use as regular I/O

Data[1] -> Use as regularr I/O

DCLK -> Use as regular I/O

FLASH_nCE/nCS0 -> Use as regular I/O[/b]

--- Quote End ---

See Altera knowledge base (http://www.altera.com/support/kdb/solutions/rd11012007_792.html?gsa_pos=1&wt.oss_r=1&wt.oss=cyclone%20iii%20epcs)

[/b]

--- Quote End ---

Hello. I seem to have a similar problem to that discussed in this thread, but with Cyclone II so the same solution does not apply (i.e. the pins are automatically assigned unlike in Cyclone III).

Here&#39;s the message I get when I try to download a file to the flash:

Using cable "USB-Blaster [USB-0]", device 1, instance 0x01

Resetting and pausing target processor: OK

No EPCS layout data - looking for section [EPCS-FF]

Unable to use EPCS device

Leaving target processor paused

I&#39;m using Cyclone II EP2C35 FPGA and EPCS64N config chip; Quartus II V6.0, NIOS II V6.0, and attempting to program directly through the command shell (I can&#39;t get a multiprocessor system to program via the Flash Programmer IDE).

The strange thing is that I already had the unit programmed and integrated into my system and it suddenly started to fail. Because it is fully integrated, I only have access to JTAG pins, but this should be adequate for debugging and reprogramming. Unfortunately, NIOS times out when I try to debug (unless I use a different project with no use of external SDRAM...not sure if this is a related problem or not at this point). And then when I try to program (whether I use the SDRAM or not), I get the communication error mentioned above.

I&#39;ve seen a few related topics with solutions for Cyclone III (assigning pins) and NIOS II V5.1 or less (incompatibility w/ lead-free EPCS devices), but those are not quite the same as the hardware and tools that I am using.

Can someone please help me determine what could be the cause of this problem, and how I can go about trying to resolve it?

Thanks!

Actually, let me provide a bit more information to my post above.

Typically, I erase the flash first with this:

nios2-flash-programmer --epcs --base=0x00000000 --instance=1 --erase-all

and then program the hardware design with this:

nios2-flash-programmer --epcs --base=0x00000000 --instance=1 ETF.flash

and then add in the software design with this:

nios2-flash-programmer --epcs --base=0x00000000 --instance=1 ETF_CPU1.flash

When everything is working correctly, I get this output:

<div class='quotetop'>QUOTE </div>

--- Quote Start ---

Erasing flash memory...

Using cable "USB-Blaster [USB-0]", device 1, instance 0x01

Resetting and pausing target processor: OK

Checksums took 0.0s

00000000 (0%): Erasing (takes a minute or two and eventually gets to 100% and tells me Erased 8192kB in xx.xs (xx.xkB/s)

Programmed 0KB in 0.0s

Did not attempt to verify device contents

Leaving target processor paused

.

Downloading flash file for hardware...

Using cable "USB-Blaster [USB-0]", device 1, instance 0x01

Resetting and pausing target processor: OK

Checksummed/read 384kB in x.xs

Erased 384kB in x.xs (xx.xkB/s)

Programmed 367KB +17KB in x.xs (xx.xKB/s)

Did not attempt to verify device contents

Leaving target processor paused

.

Downloading flash file for software...

Using cable "USB-Blaster [USB-0]", device 1, instance 0x01

Resetting and pausing target processor: OK

Checksummed/read 64kB in x.xs

Erased 64kB in x.xs (xx.xkB/s)

Programmed 9KB +55KB in x.xs (xx.xKB/s)

Did not attempt to verify device contents

Leaving target processor paused[/b]

--- Quote End ---

Unfoturtunately, that&#39;s not what&#39;s happening anymore. Now I get:

<div class='quotetop'>QUOTE </div>

--- Quote Start ---

Erasing flash memory...

Using cable "USB-Blaster [USB-0]", device 1, instance 0x01

Resetting and pausing target processor: OK

Checksums took 0.0s

00000000 (0%): Erasing (This time it just stays at 0% until jumping straight to completion after 10sec or so! Then tells me Erased 8192kB in xx.xs (xx.xkB/s)

Programmed 0KB in 0.0s

Did not attempt to verify device contents

Leaving target processor paused

.

Dowloading flash file for hardware...

Using cable "USB-Blaster [USB-0]", device 1, instance 0x01

Resetting and pausing target processor: OK

No EPCS layout data - looking for section [EPCS-FF]

Unable to use EPCS device

Leaving target processor paused

.

Dowloading flash file for software...

Using cable "USB-Blaster [USB-0]", device 1, instance 0x01

Resetting and pausing target processor: OK

No EPCS layout data - looking for section [EPCS-FF]

Unable to use EPCS device

Leaving target processor paused[/b]

--- Quote End ---

If I skip the erase step and jump right into programming, I get this:

<div class='quotetop'>QUOTE </div>

--- Quote Start ---

Using cable "USB-Blaster [USB-0]", device 1, instance 0x01

Resetting and pausing target processor: OK

Checksummed/read 384kB in 9.6s

Erased 384kB in 10.0s (38.4kB/s)

Program failed

Leaving target processor paused[/b]

--- Quote End ---

I would greatly appreciate it if anyone can help me determine what would cause this failure. Thanks!

<div class='quotetop'>QUOTE (mgirwin @ Aug 24 2009, 09:47 AM) <{post_snapback}> (index.php?act=findpost&pid=23557)</div>

--- Quote Start ---

Actually, let me provide a bit more information to my post above.

Typically, I erase the flash first with this:

nios2-flash-programmer --epcs --base=0x00000000 --instance=1 --erase-all

and then program the hardware design with this:

nios2-flash-programmer --epcs --base=0x00000000 --instance=1 ETF.flash

and then add in the software design with this:

nios2-flash-programmer --epcs --base=0x00000000 --instance=1 ETF_CPU1.flash

When everything is working correctly, I get this output:

<div class='quotetop'>QUOTE

--- Quote End ---

--- Quote Start ---

Erasing flash memory...

Using cable "USB-Blaster [USB-0]", device 1, instance 0x01

Resetting and pausing target processor: OK

Checksums took 0.0s

00000000 (0%): Erasing (takes a minute or two and eventually gets to 100% and tells me Erased 8192kB in xx.xs (xx.xkB/s)

Programmed 0KB in 0.0s

Did not attempt to verify device contents

Leaving target processor paused

.

Downloading flash file for hardware...

Using cable "USB-Blaster [USB-0]", device 1, instance 0x01

Resetting and pausing target processor: OK

Checksummed/read 384kB in x.xs

Erased 384kB in x.xs (xx.xkB/s)

Programmed 367KB +17KB in x.xs (xx.xKB/s)

Did not attempt to verify device contents

Leaving target processor paused

.

Downloading flash file for software...

Using cable "USB-Blaster [USB-0]", device 1, instance 0x01

Resetting and pausing target processor: OK

Checksummed/read 64kB in x.xs

Erased 64kB in x.xs (xx.xkB/s)

Programmed 9KB +55KB in x.xs (xx.xKB/s)

Did not attempt to verify device contents

Leaving target processor paused[/b]

--- Quote End ---

Unfoturtunately, that&#39;s not what&#39;s happening anymore. Now I get:

<div class='quotetop'>QUOTE </div>

--- Quote Start ---

Erasing flash memory...

Using cable "USB-Blaster [USB-0]", device 1, instance 0x01

Resetting and pausing target processor: OK

Checksums took 0.0s

00000000 (0%): Erasing (This time it just stays at 0% until jumping straight to completion after 10sec or so! Then tells me Erased 8192kB in xx.xs (xx.xkB/s)

Programmed 0KB in 0.0s

Did not attempt to verify device contents

Leaving target processor paused

.

Dowloading flash file for hardware...

Using cable "USB-Blaster [USB-0]", device 1, instance 0x01

Resetting and pausing target processor: OK

No EPCS layout data - looking for section [EPCS-FF]

Unable to use EPCS device

Leaving target processor paused

.

Dowloading flash file for software...

Using cable "USB-Blaster [USB-0]", device 1, instance 0x01

Resetting and pausing target processor: OK

No EPCS layout data - looking for section [EPCS-FF]

Unable to use EPCS device

Leaving target processor paused[/b]

--- Quote End ---

If I skip the erase step and jump right into programming, I get this:

<div class='quotetop'>QUOTE </div>

--- Quote Start ---

Using cable "USB-Blaster [USB-0]", device 1, instance 0x01

Resetting and pausing target processor: OK

Checksummed/read 384kB in 9.6s

Erased 384kB in 10.0s (38.4kB/s)

Program failed

Leaving target processor paused[/b]

--- Quote End ---

I would greatly appreciate it if anyone can help me determine what would cause this failure. Thanks!

[/b]

--- Quote End ---

FYI, I have discovered the source of this problem. I had a failure in my breakout board that was shorting the 3.3V JTAG line to 5V. Amazingly, this has not appeared to cause any permanent damage to the FPGA or supporting electronics. Once the breakout problem was fixed, I am now able to reprogram succesfully again.

Hi, I have the same no epcs layout data problem.

I controlled all pin assignments and I did required short circuit tests and I controlled the JTAG pins to check shorting of 3.3V and 5V. Altough all checks are OK, we see the same problem again.

We use Cyclone III and EPCS64.

Can anyone help me???