EPCS Controller Woes....

Hi Kerri!

Thanks for the encouragement!

Well, with a shaking hand I hit the Nios IDE button in SOPC builder and started a Hello_World project. My .ptf was all selected for me and the syslib was set to SDRAM and of course I chose to let the IDE manage my makefile. Great Start.

Well...snag. The build fails with the error that a gcc-lib won't fit in onchip ram. The onchip ram location is a very small chunk I have my Exception Address set to for my COMM processor. I assumed this was like the vtable in NiosI? This is my main proc and I have it set to reset to the epcs_controller. Should I change my Exception Address to point to SDRAM?

I don't see any interface to select where anything is to reside other than the syslib. Does the custom board settings have any bearing here? I assumed it was only to specify the chip, the MHz, the Flash sources, and to provide a temp config to do boot loading. (not sure about the last part) So my custom board system is very bare. Can't seem to open any of the devkit boards to compare.

I'm probably just missing something simple. This was in the wee hours last night.

Any obvious mistakes/misunderstandings? I'm about to start working on it again here.

Thanks,

Ken