Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
21 years ago

EPCS boot loader start location

Hello,

I'm upgrading a Cyclone EP1C6 based Nios 1 to Nios 2 system. In the Nios 1 system I use USB and a PC app to load C code .srec files via ASMI into the serial eeprom used to house the PLD binary. I have a USB and ASMI bootloader stored in initialised memory. It works well. I use a 4M memory, 1M for the PLD binary, the other 3M for NIOS programs.

In Nios 2, ASMI is gone, so I must use EPCS. However EPCS uses 2K of internal memory. There is no longer room to store my USB boot loader, and besides the NIOS 2 instruction set is less efficient and I can't fit the program into internal memory any more anyway. So instead I want to use the EPCS to load the entire operating program from serial EEPROM. I still want to be able to upgrade the code (and PLD binary) over the USB. This means I need to know where the code is inside the EEPROM. There is no hint in the documentation on how to locate the code at a particular location in the EEPROM, and then have the boot loader fetch it from there.

Does anyone know how to do this?

Any help much appreciated,

Bart Schroder

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    21 years ago

    I need to do the same exact thing.

    It would be nice to hear from Altera on their recommended field update procedure for NiosII. On NiosI, I've done it exactly as Bart has - USB/PC App/ASMI/custom onchip bootloader.

    I want to move to NiosII and make use of the EPCS and bootloader, but I would like to know how to update it without JTAG.

    If you figure something out Bart, please post. I'm sure there are many who are interested.

    I'm thinking we're due for the first service release for NII.

    Ken
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    21 years ago

    If you would like modify your upgrade system to use the EPCS bootloader included in the EPCS device, the loader record format is pretty simple. From boot_loader.S:

    -----------------

    Each "program record" looks like so:

    4 bytes Length L

    4 bytes Address A

    Generally, the next L bytes are then shoveled out

    of flash (cfi or epcs) and stashed at authentic

    RAM address A.

    If L is zero, then A is an address to JUMP to for your

    application to execute.

    -----------------

    Take a look in boot_loader.S and boot_loader_epcs_bits.S for clarification.

    The trick is in knowing where to write the boot image in the EPCS device. The bootloader reads the header of the design stored in the EPCS device to determine where the design ends, and the boot records begin. The process is pretty simple. Take a look in the existing or updated (see below) boot_loader_epcs_bits.S if you’re interested.

    If you would prefer a smaller and faster loader I've made one available on the IP forum. No guarantees as to its functionality, or suitability for your purposes. QA isn’t done with it yet. Use it at your own risk, etc., etc.

    The updated loader both loads faster, and fits in a single M4K. Its disadvantage in your environment is that its written to be completely re-locatable, and to compile to either an EPCS loader or a parallel flash loader. Removing some of its flexibility would easily shrink it further.

    A couple of notes:

    The ASMI device is still included in the Nios II, kit, in case you don't wish to switch to the EPCS device.

    Bart, I think you meant your EPCS device uses 2 M4Ks (1K of precious RAM) for the bootloader. Could you check to make sure this is the case?

    Alternatively, an enterprising person could replace the EPCS bootloader in their design (epcs_controller_boot_rom.hex) with one of their own making.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    21 years ago

    Hello Kschuh,

    Thanks very much for the long reply.

    Yes, I found the bootloader files, and also the format of the boot record as you illustrate. So I did actually change the bootloader, and I've got it loading the C code from a particular location (20000H in my case).

    I confirm a typo - it was 2 x M4K ram blocks, and not 2k of ram.

    It's good to hear that you've made an even smaller one - just 1 M4K block. Very good!

    Yes, I had thought about writing another loader to replace epcs_controller_boot_rom.hex, especially as I found that, as you confirm, both ASMI and initialized RAMs are still supported. Ideally I want a loader to know how to talk over my USB link, as my old one did, so I may go back to it yet. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/rolleyes.gif

    In the meantime, thanks for your suggestions.

    Bart