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Altera_Forum
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13 years ago

endless loop in stock interrupt handler

Hi people, a bit of information about my system first: - terasIC DE2-115 evaluation board with Cyclone IVE FPGA - Nios II/s CPU - also part of CPU block: SDRAM Controller, PIO, SysID, 2x ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

What's the timer period?

If you have a fast irq rate and a long interrupt handler, the irq could retrigger just after the previous isr has completed.

Do you mind posting your code?