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Altera_Forum's avatar
Altera_Forum
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13 years ago

endless loop in stock interrupt handler

Hi people, a bit of information about my system first: - terasIC DE2-115 evaluation board with Cyclone IVE FPGA - Nios II/s CPU - also part of CPU block: SDRAM Controller, PIO, SysID, 2x ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

the best way is to look for the interrupt control registers and set values to disable all interrupts so you can be sure only your main program is running.