Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Dual access block ram access from nios and custom vhdl

First, Id like to say I'm new to using Altera FPGA's so sorry if this is very simple. I have implemented a dual access block ram in SOPC. One side goes to the nios-II core so i can read and write fro...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

you need an Avalon-Memory Mapped master to connect to the dual port RAM MM slave. take a look at custom components in SOPC Builder to make your HDL into a SOPC component, or using the component editor to make a simple MM-master that gives you access to the MM signals outside of SOPC Builder. here's a place to start:

http://www.altera.com/literature/hb/qts/qts_qii54005.pdf