Downloading ELF process failed "how to remove unconstrained paths"

I agree with BadOmen about refreshing the schematic symbol in order to check if all the pins are still in the right places.

You can even proceed in the inverse direction and tell Quartus to generate a HDL file from schematic to verify any anomaly.

I also suggest to check the reset signal: has it the correct polarity? Once I spent a lot of time with a similar issue before discovering I had a

signal named reset_n in the sopc component which I actually had wrongly defined active-high.