Forum Discussion
Altera_Forum
Honored Contributor
20 years agoDownload But Verify Failed
Hi All, I am using Nios Dev Board with MT48LC2M32B2 SDRAM(It is the only execute memory). When I make a software example and download it to sdram, it displays in nios IDE console: <div class='qu...
Altera_Forum
Honored Contributor
20 years agoHi,
I calculate the phase shift(in ns). First, I compile the whole system(include PLL but leave the phase shift '0'). Then, I get the Parameters about FPGA SDRAM I/O. F=50MHz tco_max=7.587ns, sdram_d22 tco_min=2.021ns, sdram_d1 th_max=-1.666ns, sdram_d1 tsu_max=2.183ns, sdram-d1 So, I get the value: -1.6745ns. But, it has the same problem. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/sad.gif Altera do not make the document clearly, the values in the table indicate what on earth. LiangYi