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Altera_Forum
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13 years ago

Download Bitstream to Cyclone V by using the FPGA manager

Hi, I like to upload the soc_system.sof via the FPGA manager. I use the source code of the U-Boot. I have ported it to VxWorks. I use the Altera Evaluation Board REV B. . Before I begin to...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Maybe your RBF file is not correct or otherwise not being written to the data port correctly. If the fpga doesn't see the sync words then it will get stuck in 0xB01 forever. The newer kernels, 3.9 i think, have an fpga manager driver. So all you need is to copy the RBF to /dev/fpga0. I haven't actually tried this though. Newer kernels also don't take the fpga bridges out of reset so you will need to do that after programming the fpga. There is some sysfs mechanism for this as well.