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Altera_Forum
Honored Contributor
Honored ContributorDoes a NIOS II need reset?
Folks, I recently began porting my NIOS II design to its final hardware platform from the 1C20 eval board. During this effort, I eliminated reset by assigning it internally to '0'. My ...
Altera_ForumHonored Contributor
Honored ContributorHi,
About the locked signal. If I have to use a delay --> how can I make it in a counter (flip-flops) without any problems then? If you say the clock isn't stable at this point, I suppose I cannot rely on the counter value to be valid in all cases? Also how long must the delay be? Any more information appreciated. (application note??) Stefaan
