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Altera_Forum
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20 years ago

DMA

i use a dma CRC peripheral.when i run as NIOS II MODELSIM ,THE SIMULATE result is correct,but I run as the NIOS II hardware ,the result is wrong .why this results is not indential.

i use quartus 5.0 and nios II 5.0 build 73c,if i use DMA HAL,the SIMULATE result is wrong.TOO.WHY?

HELP ME.THANKS.

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    this is my verilog soure

    module crc_peripheral ( reset, clk, chipselect, write,read,

    writedata, address, readdata);

    input reset;

    input clk;

    input chipselect;

    input write;

    input read;

    input [31:0] writedata;

    input address;

    output reg [31:0] readdata;

    reg [15:0] crc_result;

    reg [15:0] crc_reg;

    //////////

    // Set result output

    //assign readdata = {16'h0, crc_reg};

    /////////

    // Initialise or update CRC reg based on address line

    wire [15:0] crc_reg_input = (address) ? crc_result : writedata[15:0];

    //////////

    // CRC needs big endian data but Nios is little endian

    // Convert data here

    wire [15:0] crc_word = {writedata[7:0], writedata[15:8]};

    wire [15:0] next_crc_word = {writedata[23:16], writedata[31:24]};

    /////////

    // CRC calculation

    integer i;

    reg [15:0] crc_array[0:16];

    always @ (crc_word, next_crc_word)

    begin

    crc_array[16] = crc_reg;

    for (i=15; i>=0; i=i-1)

    begin

    crc_array [0] = crc_array [i+1][15] ^ crc_word;

    crc_array [1] = crc_array [i+1][0];

    crc_array [2] = crc_array [i+1][1];

    crc_array [3] = crc_array [i+1][2];

    crc_array [4] = crc_array [i+1][3];

    crc_array [5] = crc_array [i+1][4] ^ crc_array [0];

    crc_array [6] = crc_array [i+1][5];

    crc_array [7] = crc_array [i+1][6];

    crc_array [8] = crc_array [i+1][7];

    crc_array [9] = crc_array [i+1][8];

    crc_array [10] = crc_array [i+1][9];

    crc_array [11] = crc_array [i+1][10];

    crc_array [12] = crc_array [i+1][11] ^ crc_array [0];

    crc_array [13] = crc_array [i+1][12];

    crc_array [14] = crc_array [i+1][13];

    crc_array [15] = crc_array [i+1][14];

    end

    crc_array[16] = crc_array[0];

    for (i=15; i>=0; i=i-1)

    begin

    crc_array [0] = crc_array [i+1][15] ^ next_crc_word;

    crc_array [1] = crc_array [i+1][0];

    crc_array [2] = crc_array [i+1][1];

    crc_array [3] = crc_array [i+1][2];

    crc_array [4] = crc_array [i+1][3];

    crc_array [5] = crc_array [i+1][4] ^ crc_array [0];

    crc_array [6] = crc_array [i+1][5];

    crc_array [7] = crc_array [i+1][6];

    crc_array [8] = crc_array [i+1][7];

    crc_array [9] = crc_array [i+1][8];

    crc_array [10] = crc_array [i+1][9];

    crc_array [11] = crc_array [i+1][10];

    crc_array [12] = crc_array [i+1][11] ^ crc_array [0];

    crc_array [13] = crc_array [i+1][12];

    crc_array [14] = crc_array [i+1][13];

    crc_array [15] = crc_array [i+1][14];

    end

    crc_result <= crc_array [0];

    end

    // CRC Register

    always @ (posedge clk or posedge reset)

    begin

    if (reset)

    crc_reg <= 0;

    else

    if (write && chipselect)

    crc_reg <= crc_reg_input;

    end

    always @ (posedge clk or posedge reset)

    begin

    if (reset)

    readdata <= 0;

    else

    if (read && chipselect)

    readdata <= {16&#39;h0,crc_reg};

    end

    endmodule
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    this is my c program

    volatile alt_u16 crcCompute(void)

    {

    alt_u16 word;

    int value;

    int pat[4]={0x00000003,0x00000004,0x00000005,0x00000006};

    //alt_u8 pat[8]={0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x04};

    int mode;

    //pat[0]=0x00000003;

    printf("start crc\n");

    IOWR(CRC_PERIPH_BASE,0,0x0000FFFF);

    //value=IORD(CRC_PERIPH_BASE,0);

    //printf("value= %x\n",value);

    // value=IORD(CRC_PERIPH_BASE,1);

    //printf("value= %x\n",value);

    /*IOWR(SLAVE_REG_0_BASE,0,0x0000F0F0);

    alt_dma_txchan_ioctl(tx,

    ALT_DMA_TX_ONLY_ON,

    (void*)(CRC_PERIPH_BASE+0x4 ));

    alt_avalon_dma_send (tx,

    (int)pat,

    16 ,

    //dma_done,

    NULL,

    NULL);*/

    IOWR_ALTERA_AVALON_DMA_STATUS(AVALON_DMA_BASE, 0);

    IOWR_ALTERA_AVALON_DMA_CONTROL(AVALON_DMA_BASE,0);

    IOWR_ALTERA_AVALON_DMA_RADDRESS(AVALON_DMA_BASE, (int)pat);

    IOWR_ALTERA_AVALON_DMA_WADDRESS(AVALON_DMA_BASE, (CRC_PERIPH_BASE+0x4));

    IOWR_ALTERA_AVALON_DMA_LENGTH(AVALON_DMA_BASE, 4);

    mode =

    ALTERA_AVALON_DMA_CONTROL_WORD_MSK |

    ALTERA_AVALON_DMA_CONTROL_GO_MSK |

    ALTERA_AVALON_DMA_CONTROL_LEEN_MSK |

    ALTERA_AVALON_DMA_CONTROL_WCON_MSK ;

    IOWR_ALTERA_AVALON_DMA_CONTROL(AVALON_DMA_BASE,mode);

    value=IORD(CRC_PERIPH_BASE,0);

    printf("value= %x\n",value);

    value=IORD(CRC_PERIPH_BASE,1);

    printf("value= %x\n",value);

    while (IORD_ALTERA_AVALON_DMA_STATUS (AVALON_DMA_BASE) &

    ALTERA_AVALON_DMA_STATUS_BUSY_MSK);

    printf("waiting crc\n");

    word = (IORD((CRC_PERIPH_BASE),1));

    printf("crc value0=%x\n",word);

    word = (IORD((CRC_PERIPH_BASE+0x1),1));

    printf("crc value1=%x\n",word);

    word = (IORD((CRC_PERIPH_BASE+0x2),1));

    printf("crc value2=%x\n",word);

    word = (IORD((CRC_PERIPH_BASE+0x3),0));

    printf("crc value3=%x\n",word);

    word = (IORD((CRC_PERIPH_BASE+0x0),0));

    printf("crc value4=%x\n",word);

    word = (IORD((CRC_PERIPH_BASE+0x1),0));

    printf("crc value5=%x\n",word);

    word = (IORD((CRC_PERIPH_BASE+0x2),0));

    printf("crc value6=%x\n",word);

    word = (IORD((CRC_PERIPH_BASE+0x3),0));

    printf("crc value7=%x\n",word);

    word = (IORD((CRC_PERIPH_BASE),0));

    printf("crc value00=%x\n",word);

    return (word);

    } /* crcCompute() */