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Altera_Forum's avatar
Altera_Forum
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15 years ago

DMA transfer inside ISR: Problem

Hi everybody, I think this is a common issue, but I didn't find a solution to my question, so hopefully I will get an answer here: I have a DMA controller which I want to use on an IRQ com...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

You are welcome!

For example you have the following possibilities for bypassing the cache.

1. You can use the IOWR/IORD(or the 16/8Bit versions)-Macros for direct memory access of your data. But in this case you have always to use IORD/IOWR to read/write valid data. The data will still be cached but as long as you use IORD/IOWR everything should work fine.

2. Use alt_uncached_malloc() / alt_uncached_free() . In this case you will get a pointer to data which will not be cached. (Remark: Bit32 of your pointer will be set to indicate that it is uncached)

I have already used both. With Alternative 2 you can more easily access your memory as you were used to. But you have to ensure that you free the memory after you don't need it anymore.

Regards