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Altera_Forum
Honored Contributor
15 years agoHi!
Thanks for reply! Yes, DMA_IRQ_INTERRUPT_CONTROLLER_ID is the id of my VIC - is 0 because in my project i have only 1 VIC - from system.h:# define DMA_BASE 0x2903440# define DMA_IRQ 0# define DMA_IRQ_INTERRUPT_CONTROLLER_ID 0 If I don't use the isr_context i have the same result....when the irq is generated the program crashed! I try to test te program with a interrupt from the UART and it works fine. If I use the HAL driver it also works fine; but I will read the status register of DMA during the ISR to detect if IRQ is generated by a EOP or length = 0. If I use the HAL driver and I read the status register in the ISR, the status register is always 0, so i will write my driver. My test code is simple: in main: IOWR_ALTERA_AVALON_UART_DIVISOR(SERIAL_UART_BASE,108); // Baud Rate: 921600 @ 100Mhz IOWR_ALTERA_AVALON_UART_EOP(SERIAL_UART_BASE,'\r'); // Serial Uart EOP: '\r alt_u8* buffer; alt_ic_isr_register( DMA_IRQ_INTERRUPT_CONTROLLER_ID, DMA_IRQ, DMA_isr, NULL, NULL); IOWR_ALTERA_AVALON_DMA_STATUS(DMA_BASE, 0); IOWR_ALTERA_AVALON_DMA_RADDRESS(DMA_BASE, SERIAL_UART_BASE); IOWR_ALTERA_AVALON_DMA_WADDRESS(DMA_BASE, buffer); IOWR_ALTERA_AVALON_DMA_LENGTH(DMA_BASE, 5); // transfer length = 5 IOWR_ALTERA_AVALON_DMA_CONTROL(DMA_BASE, 0x1F9); // enable IRQ -set single transfer lenght @ 8 bits (1 char) - enable transfer while (1) { usleep(1000000); printf("length: 0x%X\n",IORD_ALTERA_AVALON_DMA_LENGTH(DMA_BASE)); //to test if DMA recive data (for every recived char the length decrease - it works fine) } and this is the ISR routine: static void DMA_isr (void* handle) { printf("IRQ \n"); } The result is that when the program is running the length decrease an wher the length = 0 or the EOP \r is recived the program crash! No, I don't enable a seperate exception stack. (look hal.jpg) Regards