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Altera_Forum
Honored Contributor
Honored ContributorDMA receive channel
Hi Nios community, I'm building a system that uses a DMA device in a NiosII core. It is set up as a DMA receive channel to stream data from a fixed address peripheral to SRAM memory. T...
Altera_ForumHonored Contributor
Honored ContributorFurther comments / questions:
The HAL API for controlling the DMA process appears to be incomplete. To operate a receive side DMA from a fixed address and using flow control (including an endofpacket signal) some bits of the DMA control register need to be set / cleared. The only way to do this is to resort to the IOWR_ALTERA_AVALON_DMA_CONTROL macros and set / clear the bits manually. Now I'm thinking why use the API at all, if I need to resort to older style register access macros. Is there any disadvantage to using these macros? Any comments or suggestions welcome. Peter
