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Honored Contributor
Honored ContributorDMA Problems
Hi there !! I´ve got problems using dma controller in sopc builder, quartus 8.0 and cyclone III. I try to write about 16000 values of a 32 bit word from one memory to another. in a first test th...
Altera_ForumHonored Contributor
Honored ContributorIt looks like the DMA controller is waiting while the SDRAM read burst completes - which is probably expected.
The write request is buffered withing the SDRAM interface - so and early acknowledge can be given to the write bus cycles. I'm not sure how you'll get a dma controller to overlap the SDRAM read enough.
