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Altera_Forum's avatar
Altera_Forum
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21 years ago

DMA Dropouts

Hi all, I'm just bringing up our first Cyclone Nios II board and all is going pretty well. however I do seem to have a small problem with a DMA transfer. I've got a user peripheral ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
20 years ago

Hi There,

Yes I did read your thread and several others before posting. There is no particular reason why the DMA should store the transferred data via the dcache (which of course it doesn't) so the only reason why I should get data dropouts is if, when reading from SDRAM, the cpu thinks it has cached data for some of the locations. now I can discount that since I have a 4096 word dache however the dropouts do not occur until at l.east half way through the data, i.e. this implies that the dcache will well and truly have been flushed by the process of accessing and printing out the contents of the first 4-5000 elements.

So unlikely to be this, I'm really leaning towards a bug/issue with the SDRAM controller when writing sustained data burts from a dma controller. It just seems that the DMA ignores some combination of wait requests and carries on counting up its write address register.