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Honored Contributor
Honored ContributorDebugging NIOS2 + Verilog code
We are using a Stratix processor with NIOS2 (Altera University Program DE4 development board with a Stratix Ep4SGX230KF40C1 processor). We have been plagued with problems where small changes in code ...
Altera_ForumHonored Contributor
Honored ContributorDo you use the standard drivers from Altera for Ethernet or do you use your own? Do you have any other DMA in your system, or another hardware component that can access memory directly? In that case care must be taken when you have a data cache. You must flush the data cache before a component reads the memory, and you must invalidate after a component writes to it. The Altera TSE drivers do this.
