Debugging NIOS2 + Verilog code

Do you use the standard drivers from Altera for Ethernet or do you use your own? Do you have any other DMA in your system, or another hardware component that can access memory directly? In that case care must be taken when you have a data cache. You must flush the data cache before a component reads the memory, and you must invalidate after a component writes to it. The Altera TSE drivers do this.